Plasma has long been employed to process substrates (e.g., wafers or flat panels) to form electronic products (e.g., integrated circuits or flat panel displays). In plasma processing, a process gas may be injected into a chamber and energized to form a plasma to either deposit a layer on the substrate or to sputter or etch the substrate. In plasma processing, the substrate is typically disposed on top of a chuck inside a plasma processing chamber of a plasma processing system. During plasma processing, a process gas is flowed into the chamber and excited to form a plasma to process (e.g., etch or deposit) the substrate. After plasma processing is completed, the plasma is extinguished and the wafer is removed from the chamber for further processing.
In some chambers, an electrostatic chuck (ESC) 102 is employed to support the substrate during processing. The electrostatic chuck, which is well known in the art, employs electrostatic force to hold or clamp the wafer onto the surface of the chuck during processing. To facilitate discussion, FIG. 1 shows a high level conceptual diagram of a typical plasma processing system, including an electrostatic chuck 102. With reference to FIG. 1, electrostatic chuck 102 is shown disposed in a chamber enclosure 104. Electrostatic chuck 102 typically includes at least a metal plate 106, which may be energized by a suitable energy source such as RF power supply 108.
Above metal plate 106, there is typically disposed a ceramic plate 110. A wafer 112 is shown positioned on top of ceramic plate 110 for processing. To clamp wafer 112 to the upper surface of ceramic plate 110 of the electrostatic chuck 102, one or (more ESC poles 120 and 122 may be embedded inside ceramic plate 110 and energized by an appropriate ESC clamping voltage source.
In the example of FIG. 1, a bipolar ESC having two ESC poles is shown. There are thus a positive pole 120 and a negative pole 122 embedded within ceramic plate 110. When poles 120 and 122 are energized by the ESC clamping voltage source (not shown in FIG. 1 to improve drawing clarity), a capacitor of sorts is formed, and an electrostatic force is generated between the upper surface of ceramic plate 110 and the lower surface of wafer 112 to clamp wafer 112 to the upper surface of ceramic plate 110 during processing. To improve heat transfer between wafer 112 and the ESC 102 for better thermal control during processing, helium backside cooling may be employed. In the example FIG. 1, conduit 130 is employed to provide backside helium cooling, which furnishes a heat transfer medium (such as helium gas) to the backside of wafer 112 during processing.
During processing, a plasma is formed above wafer 112 within chamber enclosure 104 to process wafer 112. When the processing step is completed, the plasma is extinguished (e.g., RF energy that is used to excite the process gas to form the plasma is turned off). After the plasma is turned off, lift pins (not shown) are typically employed to lift wafer 112 off the surface of ceramic plate 110.
To assist in the wafer removal process, a low energy or low density plasma may be temporarily created in order to allow charges on the wafer to dissipate from the region between the lower surface of wafer 112 and the upper surface of ceramic plate 110. In this case, low RF power is applied to create a low density plasma with low ion energy. The plasma is present to provide a discharge path for declamping the wafer. Low power is employed to minimize additional unwanted modification to the wafer.
The plasma is turned on then turned off after a wait period to allow the wafer to dechuck. Then the chamber is pumped out and lifter pins are actuated to lift the wafer for removal, typically by a suitable robot arm arrangement. In an alternative process, the plasma is turned on then lifter pins are actuated after a wait period while the plasma is still on. Then the plasma is shut off and chamber pumped out for wafer removal. The arrangement of FIG. 1 and the process of wafer removal as discussed thus far are conventional and require no further elaboration.
There are times however, that wafer 112 may become stuck on ceramic plate 110. For example, if plasma dechuck is not possible (e.g., due to a process abort, plasma drop-out, unconfinement, wafer pop-off, generator failure, pending alarm condition plasma dechuck failure, and the like), there is a need for a procedure to safely remove the stuck wafer from the ESC 102 without damage to the chamber components or the wafer.
In the prior art, one approach for removing a stuck wafer involves the use of a high pressure helium flow to the backside of wafer 112. Generally speaking, an initial high volume flow of helium is provided while the clamping voltages are still provided to poles 120 and 122. For example, helium flow in the range of 80 Torr may be provided to the backside of wafer 112 while clamping voltages are provided to poles 120 and 122 to continue to hold the wafer 112 to the top surface of the ESC 102.
The clamping voltage are then removed, allowing the pressure built up in conduit 130 to explosively or suddenly push wafer 112 away from the upper surface of ceramic plate 110. Although this approach tends to be successful in separating wafer 112 from the upper surface of the ESC 102, there are disadvantages. For example, when wafer 112 is explosively ejected from the upper surface of ceramic plate 110, wafer 112 may be chipped or otherwise damaged, possibly contributing to contamination within the chamber. As another example, the explosively ejected wafer 112 may collide with one or more chamber components, thereby possibly damaging the chamber. Still further, if there is polymer deposition inside the chamber, the explosively ejected wafer 112 may impact with the polymer deposition, possibly flaking or dislodging some of the polymer deposition. The partially or fully dislodged polymer deposition flakes may then cause particulate contamination issues in subsequent process runs.
Another approach to remove a stuck wafer involves using brute force. In this approach, the lift pins are employed to force the wafer 112 of the surface of ceramic plate 110. This approach may crack wafer 112, resulting in a damaged wafer as well as potential contamination issues.
Still further, since there is still residual charge on the upper surface of ceramic plate 110 when the lift pins attempt to force the stuck wafer off the surface of the ESC 102, the brute force method (using either high pressure helium for explosive ejection or the lift pins for brute force lift) may result in damage to the upper surface of the ESC 102. This is because if the wafer 112 hinges or tips, and one corner or edge of the wafer 112 comes into contact with the upper surface of the ESC 102 during the brute force lifting up attempt, the residual charge on wafer 112 and/or the upper surface of ceramic plate 110 may be sufficient to cause arcing to occur, thereby damaging the upper surface of ceramic plate 110.
As a last resort, the chamber may be opened and the human operator may attempt to manually remove the stuck wafer. However, this is a time-consuming and laborious process and is potentially expensive due to the negative impact on throughput since chamber operation needs to be stopped and chamber conditioning for continued operation after manual wafer removal may take some nontrivial amount of time to accomplish.
In view of the foregoing, there are desired improved methods and techniques for safely removing a stuck wafer from the upper surface of an ESC.